From the Linux and PCIe driver point of view the activities I am supposed to do are Linux porting for the ARM processor including its PCIe support and already present Root Complex driver (pcieport-driver, linuxdriverspcipcie).In this case I have understood that the model described in linuxDocumentationPCIPCIEBUS-HOWTO.txt is to be used and service drivers for the 4 services (AER, HP, PME, VC) are to be written if needed.But is providing only service drivers enough to completely manage a Root Complex device or something else is needed Is there a Root Complex driver that anyone can use as example sorry for my poor english and thank you very much in advance.Is that correct Post by Stefano Tebaldi I have understood that for a PCIe endpoint the driver model to be used is the normal PCI driver model that uses pciregisterdriver() API and pcidriver struct for example as described in linuxDocumentationPCIpci.txt.
A possible example of such type of driver is the e1000e driver in linuxdriversnet is it correct Thats correct. Post by Stefano Tebaldi My doubts are related to drivers for a Root Complex device. But is providing only service drivers enough to completely manage a Root Complex device or something else is needed Is there a Root Complex driver that anyone can use as example You generally dont need to write drivers for a Root Complex. You may need to discover it using whatever mechanism the ARM platform provides for discovering devices. Pci Root Complex Hp Code To TranslateYou might need to write code to translate inb() into IO port cycles on the PCI bus and writeb() into memory cycles. I would recommend that you not do PCI config cycles; Linux doesnt handle multiple root complexes in a system particularly well -- if you try to resize BARs on an active device, youre likely to crash the machine. Its probably best to ignore the RC functionality, and concentrate on having your ARM board be just an endpoint. If you want to get really advanced, you could look at having some way of partitioning the devices between the host board and the ARM board, but Im not sure that the hardware in the PCIe fabric is going to handle having multiple root complexes terribly well. Matthew Wilcox Intel Open Source Technology Centre Bill, look, we understand that youre interested in selling us this operating system, but compare it to ours. Hi Matthew, thanks for your answers some aspects are not completely clear to me yet, especially for Root Complex device, but I have just started on these topics Stefano Post by Matthew Wilcox Post by Stefano Tebaldi Hi all, I am quite newbie about PCIe and Linux Kernel development I have to write a driver for a PCIe chip that can act either as EndPoint or Root Complex device The chip is on a board with an ARM processor and Linux 2.6 I think what youre trying to say here is that from the point of view of the host system, its an endpoint, but from the point of view of t he Post by Matthew Wilcox ARM processor, its a Root Complex. C2A0Is that correct Post by Stefano Tebaldi I have understood that for a PCIe endpoint the driver model to be us ed Post by Matthew Wilcox Post by Stefano Tebaldi is the normal PCI driver model that uses pciregisterdriver() API a nd Post by Matthew Wilcox Post by Stefano Tebaldi pcidriver struct for example as described in linuxDocumentationPCIpci.txt. But is providing only service drivers enough to completely manage a Root Complex device or something else is needed Is there a Post by Matthew Wilcox Post by Stefano Tebaldi Root Complex driver that anyone can use as example You generally dont need to write drivers for a Root Complex. C2A0Y ou may Post by Matthew Wilcox need to discover it using whatever mechanism the ARM platform provide s Post by Matthew Wilcox for discovering devices. C2A0You might need to write code to transl ate inb() Post by Matthew Wilcox into IO port cycles on the PCI bus and writeb() into memory cycles. I would recommend that you not do PCI config cycles; Linux doesnt handle multiple root complexes in a system particularly well -- if yo u try Post by Matthew Wilcox to resize BARs on an active device, youre likely to crash the machin e. ![]() If you want to get really advanced, you could look at having some way of partitioning the devices between the host board and the ARM board, but Im not sure that the hardware in the PCIe fabric is going to han dle Post by Matthew Wilcox having multiple root complexes terribly well. ![]() C2A0We cant possibly tak e such Post by Matthew Wilcox a retrograde step. Hi again, I have clarified possible scenarios related to the board I told about in my previous posts: 1) the PCIe on the board can act as PCIe Root Complex. In this scenario I can plug several PCIe devices that will act as PCIe Endpoint.
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